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portmacro.h
1/*
2 FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
3 All rights reserved
4
5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
6
7 This file is part of the FreeRTOS distribution.
8
9 FreeRTOS is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License (version 2) as published by the
11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
12
13 ***************************************************************************
14 >>! NOTE: The modification to the GPL is included to allow you to !<<
15 >>! distribute a combined work that includes FreeRTOS without being !<<
16 >>! obliged to provide the source code for proprietary components !<<
17 >>! outside of the FreeRTOS kernel. !<<
18 ***************************************************************************
19
20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
23 link: http://www.freertos.org/a00114.html
24
25 ***************************************************************************
26 * *
27 * FreeRTOS provides completely free yet professionally developed, *
28 * robust, strictly quality controlled, supported, and cross *
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31 * *
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34 * tutorial book, reference manual, or both: *
35 * http://www.FreeRTOS.org/Documentation *
36 * *
37 ***************************************************************************
38
39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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66
67 1 tab == 4 spaces!
68*/
69
70#ifndef PORTMACRO_H
71#define PORTMACRO_H
72
73#ifdef __cplusplus
74 extern "C" {
75#endif
76
77/*-----------------------------------------------------------
78 * Port specific definitions.
79 *
80 * The settings in this file configure FreeRTOS correctly for the given hardware
81 * and compiler.
82 *
83 * These settings should not be altered.
84 *-----------------------------------------------------------
85 */
86
87/* Type definitions. */
88#define portCHAR char
89#define portFLOAT float
90#define portDOUBLE double
91#define portLONG long
92#define portSHORT short
93#define portSTACK_TYPE uint32_t
94#define portBASE_TYPE long
95
96typedef portSTACK_TYPE task_stack_t;
97typedef long int32_t;
98typedef unsigned long uint32_t;
99
100typedef uint32_t uint32_t;
101#define portMAX_DELAY ( uint32_t ) 0xffffffffUL
102
103/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
104not need to be guarded with a critical section. */
105#define portTICK_TYPE_IS_ATOMIC 1
106
107/*-----------------------------------------------------------*/
108
109/* Hardware specifics. */
110#define portSTACK_GROWTH ( -1 )
111#define portTICK_PERIOD_MS ( ( uint32_t ) 1000 / configTICK_RATE_HZ )
112#define portBYTE_ALIGNMENT 8
113
114/*-----------------------------------------------------------*/
115
116/* Task utilities. */
117
118/* Called at the end of an ISR that can cause a context switch. */
119#define portEND_SWITCHING_ISR( xSwitchRequired )\
120{ \
121extern uint32_t ulPortYieldRequired; \
122 \
123 if( xSwitchRequired != pdFALSE ) \
124 { \
125 ulPortYieldRequired = pdTRUE; \
126 } \
127}
128
129#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
130#define portYIELD() __asm volatile ( "SWI 0" );
131
132
133/*-----------------------------------------------------------
134 * Critical section control
135 *----------------------------------------------------------*/
136
137extern void vPortEnterCritical( void );
138extern void vPortExitCritical( void );
139extern uint32_t ulPortSetInterruptMask( void );
140extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
141extern void vPortInstallFreeRTOSVectorTable( void );
142
143/* These macros do not globally disable/enable interrupts. They do mask off
144interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
145#define portENTER_CRITICAL() vPortEnterCritical();
146#define portEXIT_CRITICAL() vPortExitCritical();
147#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
148#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
149#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
150#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
151
152/*-----------------------------------------------------------*/
153
154/* Task function macros as described on the FreeRTOS.org WEB site. These are
155not required for this port but included in case common demo code that uses these
156macros is used. */
157#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
158#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
159
160/* Prototype of the FreeRTOS tick handler. This must be installed as the
161handler for whichever peripheral is used to generate the RTOS tick. */
162void FreeRTOS_Tick_Handler( void );
163
164/* If configUSE_TASK_FPU_SUPPORT is set to 1 (or left undefined) then tasks are
165created without an FPU context and must call vPortTaskUsesFPU() to give
166themselves an FPU context before using any FPU instructions. If
167configUSE_TASK_FPU_SUPPORT is set to 2 then all tasks will have an FPU context
168by default. */
169#if( configUSE_TASK_FPU_SUPPORT != 2 )
170 void vPortTaskUsesFPU( void );
171#else
172 /* Each task has an FPU context already, so define this function away to
173 nothing to prevent it being called accidentally. */
174 #define vPortTaskUsesFPU()
175#endif
176#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
177
178#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
179#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
180
181/* Architecture specific optimisations. */
182#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
183 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
184#endif
185
186#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
187
188 /* Store/clear the ready priorities in a bit map. */
189 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
190 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
191
192 /*-----------------------------------------------------------*/
193
194 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )
195
196#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
197
198#ifdef configASSERT
199 void vPortValidateInterruptPriority( void );
200 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
201#endif /* configASSERT */
202
203#define portNOP() __asm volatile( "NOP" )
204#define portINLINE __inline
205
206#ifdef __cplusplus
207 } /* extern C */
208#endif
209
210
211/* The number of bits to shift for an interrupt priority is dependent on the
212number of bits implemented by the interrupt controller. */
213#if configUNIQUE_INTERRUPT_PRIORITIES == 16
214 #define portPRIORITY_SHIFT 4
215 #define portMAX_BINARY_POINT_VALUE 3
216#elif configUNIQUE_INTERRUPT_PRIORITIES == 32
217 #define portPRIORITY_SHIFT 3
218 #define portMAX_BINARY_POINT_VALUE 2
219#elif configUNIQUE_INTERRUPT_PRIORITIES == 64
220 #define portPRIORITY_SHIFT 2
221 #define portMAX_BINARY_POINT_VALUE 1
222#elif configUNIQUE_INTERRUPT_PRIORITIES == 128
223 #define portPRIORITY_SHIFT 1
224 #define portMAX_BINARY_POINT_VALUE 0
225#elif configUNIQUE_INTERRUPT_PRIORITIES == 256
226 #define portPRIORITY_SHIFT 0
227 #define portMAX_BINARY_POINT_VALUE 0
228#else
229 #error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
230#endif
231
232/* Interrupt controller access addresses. */
233#define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )
234#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )
235#define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )
236#define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )
237#define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )
238
239#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
240#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
241#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
242#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
243#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
244#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
245#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
246
247#endif /* PORTMACRO_H */
248